Advance List of Accepted Papers

Here is an advance list of accepted papers with the layout. All papers will get 6 pages in the proceedings, regardless of presentation format (long, short, or poster). Authors may want to get a head start on preparing the camera-ready version by following the instructions on Sheridan Printing’s page.

• (104) Ehsan K. Ardestani, Elnaz Ebrahimi, Gabriel Southern and Jose Renau “Thermal-Aware Sampling in Architectural Simulation”
• (105) Zhen Fang, Li Zhao, Xiaowei Jiang, Shih-lien Lu, Ravishankar Iyer, Tong Li and Seung Eun Lee “Reducing L1 Caches Power By Exploiting Software Semantics”
• (107) Andrew Kahng, Seokhyeong Kang, Tajana Rosing and Richard Strong “TAP: Token-Based Adaptive Power Gating”
• (108) Lei Jiang, Youtao Zhang and Jun Yang “ER: Elastic RESET for Low Power and Long Endurance MLC based Phase Change Memory”
• (115) Rangharajan Venkatesan, Vivek Kozhikkottu, Charles Augustine, Arijit Raychowdhury, Kaushik Roy and Anand Raghunathan “TapeCache: A High Density, Energy Efficient Cache Based on Domain Wall Memory”
• (117) Jieming Yin, Pingqiang Zhou, Anup Holey, Sachin S. Sapatnekar and Antonia Zhai “Energy Efficient Non-Minimal Path On-chip Interconnection Network for Heterogeneous Systems”
• (118) Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Chunyue Liu and Glenn Reinman “BiN: A Buffer-in-NUCA Scheme for Accelerator-Rich CMPs”
• (119) Yasuko J. Eckert, Srilatha Manne, Michael J. Schulte and David A. Wood “Something Old and Something New: P-States Can Borrow Microarchitecture Techniques Too”
• (125) Anvesha Amaravati and Maryam Shojaei Bhagini “Process and Temperature Invariant Bandwidth and Gain, Low-Area, Low-Power and High Swing Gm-C Filter for Neuro-potential Signal Conditioning”
• (126) Yong Li, Yiran Chen and Alex K. Jones “A Software Approach for Combating Asymmetries of Non-Volatile Memories”
• (129) Aatmesh Shrivastava, John Lach and Benton Calhoun “A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect”
• (130) Shusuke Yoshimoto, Masaharu Terada, Youhei Umeki, Shunsuke Okumura, Atsushi Kawasumi, Toshikazu Suzuki, Shinichi Moriwaki, Shinji Miyano, Hiroshi Kawaguchi and Masahiko Yoshimoto “A 40-nm 256-Kb Sub-10 pJ/Access 8T SRAM with Read Bitline Amplitude Limiting (RBAL) Scheme”
• (137) Seokgi Kim, Soontae Kim and Yebin Lee “DRAM Power-Aware Rank Scheduling”
• (147) Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian and Glenn Reinman “CHARM: A Composable Heterogeneous Accelerator-Rich Microprocessor”
• (149) Jason Cong and Bo Yuan “Energy-Efficient Scheduling on Heterogeneous Multi-core Architectures”
• (157) Abbas Rahimi, Luca Benini and Rajesh Gupta “Procedure Hopping: a Low Overhead Solution to Mitigate Variability in Shared-L1 Processor Clusters”
• (158) Tetsutaro Hashimoto, Satoshi Tanabe, Kouichi Nakayama and Hisanori Fujisawa “Voltage Droop Reduction for Multiple-Power Domain SoCs with On-Die LDO Using Output Voltage Boost and Adaptive Response Scaling”
• (161) Yi-Wei Lin, Hao-I Yang, Geng-Cing Lin, Chi-Shin Chang, Ching-Te Chuang, Wei Hwang, Chia-Cheng Chen, Willis Shih and Huan-Shun Huang “A 55nm 0.55V 6T SRAM with Variation-Tolerant Dual-Tracking Word-Line Under-Drive and Data-Aware Write-Assist”
• (162) Dongsoo Lee, Sumeet Gupta and Kaushik Roy “High-Performance Low-Energy STT MRAM Based on Balanced Write Scheme”
• (166) Zhenyu Sun, Hai Li and Wenqing Wu “A Dual-mode Architecture for Fast-switching STT-RAM”
• (169) Kyle Craig, Yousef Shakhsheer, Sudhanshu Khanna, Saad Arrabi, John Lach, Benton Calhoun and Stephen Kosonocky “A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs”
• (171) Guangyu Sun, Yaojun Zhang, Yu Wang and Yiran Chen “Improving Energy Efficiency of Write-asymmetric Memories by Log Style Write”
• (172) Qingan Li, Jianhua Li, Liang Shi, Chun J. Xue and Yanxiang He “MAC: Migration-Aware Compilation for STT-RAM based Hybrid Cache in Embedded Systems”
• (179) Zhenyu Sun, Xiuyuan Bi and Hai Li “Process Variation Aware Data Management for STT-RAM Cache Design”
• (181) Elif Selin Mungan, Chao Lu, Kaushik Roy and Vijay Raghunathan “Modeling, Design and Cross-Layer Optimization of Polysilicon Solar Cell Based Micro-scale Energy Harvesting System”
• (182) Da-Cheng Juan and Diana Marculescu “Power-aware Performance Increase via Core/Uncore Reinforcement Control for Chip-Multiprocessors”
• (184) Xin Zhao and Sung Kyu Lim “TSV Array Utilization in Low-Power 3D Clock Network Design”
• (185) Aaron Rogers, David Kaplan, Eric Quinnell and Bill Kwan “The Core-C6 (CC6) Sleep State of the AMD Bobcat x86 Microprocessor”
• (194) Woojoo Lee, Yanzhi Wang, Donghwa Shin, Naehyuck Chang and Massoud Pedram “Power Conversion Efficiency Characterization and Optimization for Smartphones”
• (197) Jongmin Lee and Soontae Kim “Adopting TLB Index-based Tagging to Data Caches for Tag Energy Reduction”
• (204) Song Chen, Xiaolin Zhang and Takeshi Yoshimura “Practically Scalable Floorplanning with Voltage Island Generation”
• (209) Jishen Zhao, Guangyu Sun, Gabriel Loh and Yuan Xie “Energy-Efficient GPU Design with Reconfigurable In-Package Graphics Memory”
• (217) Yu-Ting Chen, Jason Cong, Hui Huang, Chunyue Liu, Raghu Prabhakar and Glenn Reinman “Static and Dynamic Co-Optimizations for Blocks Mapping in Hybrid Caches”
• (227) Yuhao Wang, Chun Zhang, Hao Yu and Wei Zhang “3D Integrated Hybrid Memory System based on Non-volatile CBRAM-crossbar with Block-level Data-retention”
• (229) Eric Donkoh and Patrick Chiang “A Low-Leakage Dynamic Register File with Unclocked Wordline and Sub-Segmentation for Improved Bitline Scalability”
• (238) Davide Zoni, Simone Corbetta and William Fornaciari “HANDS: Heterogeneous Archtiectures and Networks-on-Chip Design and Simulation”
• (241) Svilen Kanev, Gu-Yeon Wei and David Brooks “XSim: Detailed Integrated Power-Performance Modeling of Mobile x86 Cores”
• (244) Mirko Loghi, Haroon Mahmood, Andrea Calimera, Massimo Poncino and Enrico Macii “Energy-Optimal Caches with Guaranteed Lifetime”
• (246) Wei Zheng, Ana Centeno, Frederic Chong and Ricardo Bianchini “LogStore: Toward Energy-Proportional Storage Servers”
• (249) Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijay Narayanan and Mahmut Kandemir, “Design Space Evaluation of Workload-specific Last Level caches”
• (253) Yang Ge, Yukan Zhang, Qinru Qiu and Yung-Hsiang Lu “A Game Theoretic Resource Allocation for Overall Energy Minimization in Mobile Cloud Computing System”
• (262) Mingoo Seok “Performance and Energy-Efficiency Improvement through Modified CPL in Organic Transistor Integrated Circuits”
• (266) Qingyuan Deng, David Meisner, Abhishek Bhattacharjee, Thomas F. Wenisch, and Ricardo Bianchini “MultiScale: Memory System DVFS with Multiple Memory Controllers”
• (267) Christine Chan, Yanqin Jin, Yen-Kuan Wu, Kenny Gross, Kalyan Vaidyanathan and Tajana Simunic Rosing “Fan-Speed-Aware Scheduling of Data Intensive Jobs”
• (270) Lu Wan and Deming Chen “CCP: Common Case Promotion for Improved Timing Error Resilience with Energy Efficiency”
• (274) Jason Allred, Sanghamitra Roy and Koushik Chakraborty “Designing for Dark Silicon: A Methodological Perspective on Energy Efficient Systems”
• (275) Nicola Cottini, Massimo Gottardi, Nicola Massari, Roberto Passerone and Zeev Smilansky “A 33uW 42 GOPS/W 64x64 pixels vision sensor with dynamic background subtraction for scene interpretation”
• (276) Matthew Schuchhardt, Ben Scholbrock, Utku Pamuskuz, Gokhan Memik, Peter Dinda and Robert Dick “Understanding the Impact of Laptop Power Saving Options Using Physiological Sensors”
• (286) James Bradley Wendt, Saro Meguerdichian, Hyduke Noshadi and Miodrag Potkonjak “Semantics-driven Sensor Configuration for Energy Reduction in Medical Sensor Networks”
• (289) Jerome Lescot, Vincent Bligny, Dina Medhat, Sophie Billy, Didier Chollat-Namy, Ziyang Lu and Mark Hofmann “Static Low Power Verification Flow at Transistor Level for SoC Design”
• (296) Himanshu Markandeya, Shriram Raghunathan, Pedro Irazoqui and Kaushik Roy “A low-power “near-threshold” epileptic seizure detection processor with multiple algorithm programmability”
• (299) Hassan Ghasemzadeh, Navid Amini and Majid Sarrafzadeh “Energy-Efficient Signal Processing in Wearable Embedded Systems: An Optimal Feature Selection Approach”
• (312) Alberto Ros, Polychronis Xekalakis, Marcelo Cintra, Manuel E. Acacio and Jose M. Garcia “ASCIB: Adaptive Selection of Cache Indexing Bits for Removing Conflict Misses”
• (314) Akira Saito, Yunfei Zheng, Kazunori Watanabe, Takayasu Sakurai and Makoto Takamiya “0.5V, 4.1uW, 39MHz Crystal Oscillator Circuit in 40nm CMOS”
• (317) Mingoo Seok “A Fine-Grained Many VT Design Methodology for Ultra Low Voltage Operations”
• (322) Yusung Kim, Sumeet Gupta, Sang Phill Park, Georgios Panagopoulos and Kaushik Roy “Write-Optimized Reliable Design of STT MRAM”
• (338) Daeyeon Kim, Vikas Chandra, Robert Aitken, David Blaauw and Dennis Sylvester “An Adaptive Write Word-Line Pulse Width and Voltage Modulation Architecture for Bit-Interleaved 8T SRAMs”
• (339) Debashis Banerjee, Shreyas Sen, Aritra Banerjee and Abhijit Chatterjee “Low-Power Adaptive RF Systems using Real-time Fuzzy Noise-Distortion Control”
• (342) Dimin Niu, Cong Xu, Naveen Muralimanohar, Norm Jouppi and Yuan Xie “Design Trade-Offs for Low-Power, High Density Cross-Point Resistive Memory”
• (344) Sae Kyu Lee, David Brooks and Gu-Yeon Wei “Evaluation of voltage stacking for near-threshold multicore computing”
• (345) Kyle Craig, Yousef Shakhsheer and Benton Calhoun “Optimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operation”
• (351) Saurabh Sinha, Brian Cline, Greg Yeric, Vikas Chandra and Yu Cao “Design Benchmarking to 7nm with FinFET Predictive Technology Models”
• (353) Eric Donkoh, Teck Siong Ong, Yan Nee Too and Patrick Chiang “Register File Write Data Gating Techniques and Break-Even Analysis Model”
• (356) Yanzhi Wang, Xue Lin, Naehyuck Chang and Massoud Pedram “Dynamic Reconfiguration of Photovoltaic Energy Harvesting System in Hybrid Electric Vehicles”
• (372) Sangyoung Park, Yanzhi Wang, Younghyun Kim, Naehyuck Chang and Massoud Pedram “Battery Management for Grid-connected Photovoltaic Power Generation Systems”
• (376) Inkwon Hwang, Timothy Kam and Massoud Pedram “A Study of the Effectiveness of CPU Consolidation in a Virtualized Multi-Core Server System”