Advance List of Accepted Papers

Here is an advance list of accepted papers. There are three categories:

Regular papers: 6 pages in the proceedings, oral presentation
Poster papers: 6 pages in the proceedings, poster presentation
Work-in-progress abstracts: 1 page (abstract) in the proceedings, poster presentation

The offical acceptance or rejection notice along with reviewer comments will be sent in email in one week from the TPC meeting.

Best-paper candidates are designated with a + sign next to the paper number.

Regular Papers

(11) Minimum Supply Voltage for Sequential Logic Circuits in a 22nm Technology
(28) Impact of Back Gate Biasing Schemes on Energy and Robustness of ULV Logic in 28nm UTBB FDSOI Technology
(30) A 40nm 0.32V 3.5MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
(123)+ SRAM Cell Optimization for low AVT Transistors
(134) REEL: Reducing Effective Execution Latency of Floating Point Operations
(162) Low-Voltage Low-Overhead Asynchronous Logic
(197) Multi-level STT-MRAM Using Domain Wall Magnet for Energy Efficient, High Density Caches
(201) Single-Cycle, Pulse-Shaped Critical Path Monitor in the Power7+ Microprocessor
(228) Robust and Energy-Efficient Asynchronous Dynamic Pipelines for Ultra-Low-Voltage Operation Using Adaptive Keeper Control

(18) Write Intensity Prediction for Energy-Efficient Non-Volatile Caches
(39) Mitigating Refresh Penalties for Embedded DRAM based Register File in GPGPUs
(44) An energy-efficient branch prediction technique via global-history noise reduction
(63) Coordinated Refresh: Energy Efficient Techniques for DRAM Refresh Scheduling
(131) An Energy Efficient GPGPU Memory Hierarchy With Tiny Incoherent Caches
(173) Variable-Energy Write STT-RAM Architecture with Bit-Wise Write-Completion Monitoring
(187) Design and Analysis of 3D IC-Based Low Power Stereo Matching Processors
(209) Design and Analysis of Ultra Low Power Processors Using Sub/Near-Threshold 3D Stacked ICs
(216)+ WoM-SET: Low Power Proactive-SET-based PCM Write using WoM Code
(235) A Pipeline Architecture with 1-Cycle Timing Error Correction for Low Voltage Operations

(32) A Practical Low-Power Memristor-based Analog Neural Branch Predictor
(90) Tunnel FET based Ultra-Low Power, High Sensitivity UHF RFID Rectifier
(105) Switched-Capacitor Boost Converter Design and Modeling for Indoor Optical Energy Harvesting with Integrated Photodiodes
(176) An Energy-efficient 5-MHz to 20-MHz, 12-bit Reconfigurable Continuous-time Sigma-delta Modulator for 4G-LTE Application

(91) Automated Checkpointing for Enabling Intensive Applications on Energy Harvesting Devices
(106) SIMES: A Simulator for Hybrid Electrical Energy Storage Systems
(137) Power Mapping and Modeling of Multi-core Processors
(147) Early Detection of Current HotSpots in Power Gated Designs

(43) Chameleon: Adapting Throughput Server to Time-Varying Green Power Budget Using Online Learning
(109) Maximum Power Transfer Tracking in a Solar USB Charger for Smartphone
(117) A Statistical Model of Cell-to-Cell Variation in Li-Ion Batteries for System-Level Design
(136) Characterizing and Evaluating Voltage Noise in Multi-Core Near-Threshold Processors
(144)+ Energy Minimization for Fault Tolerant Real-Time Applications on Multiprocessor Platforms Using Checkpointing
(181) Digital Bimodal Function: An Ultra-Low Energy Security Primitive
(195) Active SSD Design for Energy-efficiency Improvement of Web-scale Data Analysis
(202) Energy-Efficient Computing Using Adaptive Table Lookup Based on Nonvolatile Memories
(231) A Framework of Concurrent Task Scheduling and Dynamic Voltage and Frequency Scaling in Real-Time Embedded Systems with Energy Harvesting

(165) Content-Driven Adaptive Computation Offloading for Energy-Aware Hybrid Distributed Video Coding
(191) Power Estimation for Mobile Applications with Profile Driven Battery Traces
(217) Update Rate Tradeoffs for Improving Online Power Modeling in Smartphones

(72) Robustness-Driven Energy-Efficient Ultra-Low Voltage Standard Cell Design with Intra-Cell Mixed-Vt Methodology
(85) Energy-Efficient Pass-Transistor-Logic Using Decision Feedback Equalization
(128) ESPN: A Case for Energy-Star Photonic on-chip Network
(175) Lithography-aware

(26) Page Policy Control with Memory Partitioning for DRAM Performance and Power Efficiency
(62) Composable Accelerator-rich Microprocessor Enhanced for Adaptivity and Longevity
(76) An Ultralow-power Memory-based Big-data Computing Platform by Nonvolatile Domain-wall Nanowire Devices
(100) PreTrans: Reducing TLB CAM-Search via Page Number Prediction
(212) Hardware Acceleration for Similarity Measurement in Natural Language Processin

(120) A Novel Envelope Edge Detector for Ultra-low Power Sensor Wake-up Circuit
(156) Rethinking DC-DC Converter Design Constraints for Adaptable Systems that Target the Minimum-Energy Point

(108) An Analytical Solution For Multi-Core Energy Calculation With Consideration Of Leakage And Temperature Dependency
(224) Power Reduction by Aggressive Synthesis Design Space Exploration

(64) Platform-Dependent, Adaptive Setting of the Driving Current of the Thermoelectric Coolers
(71) Understanding the Critical Path in Power State Transition Latencies
(103) A Hybrid Display Frame Buffer Architecture for Energy-Efficient Display Subsystem
(113) A Biomass-based Marine Sediment Energy Harvesting System
(115) An Automated Framework for Generating Variable-Accuracy Battery Models from Datasheet Information
(169) Quantifying Acceleration: Power and Performance Tradeoffs of Application Kernels in Hardware

(161) Energy Characterization and Instruction Level Energy Model of Intel’s Xeon Phi Processor
(215) vCap: Adaptive Power Capping for Virtualized Servers

(None)

(36) Exploring Synergistic DVFS Control of Cores and DRAMs for Thermal Efficiency in CMPs with 3D-stacked DRAMs
(49) Prefetching Techniques for STT-RAM Last-level Cache in CMP System

(190) A Low Power ECG Acquisition System Implemented With A Fully Integrated Analog Front-End

(None)

(None)

(96) Utilization-based Power Modeling of Modern Mobile Application Processor
(174) Understanding Query Complexity and its Implications for Energy-Efficient Web Search

Submission site to open	Mar. 01
Abstract Registration	Mar. 22
Paper Submission	Mar. 29
Accept/Reject Notification	May 20
Design Contest Deadline	Jun. 12
Camera-ready and Author Registration	Jun. 27
Advance Registration Deadline	Aug. 1
Hotel Resevation Deadline	Aug. 8
Conference	Sep. 4 to Sep. 6