Day 1 August 8th
8:00 - 8:30 Conference Registration
8:30 - 8:50 Welcome by General and TPC Chairs
8:50 - 9:50 Keynote 1:
Vida Ilderem - Vice-President and Director of the Wireless Communication Research Labs at Intel

Title: Innovation for Future Connected Compute
Abstract: Internet of Things (IOT) is a rapidly growing market that is being targeted by many companies world-wide to address significant local or global challenges. The projections for growth in this area are for up to 50 billion devices connected to the internet by 2020. Further trends in this market point to an exciting opportunity to truly pursue pervasive computing where energy efficient connected devices is one of, if not the most important, technology needed.
9:50 - 10:20 Coffee Break
10:20 - 12:00 Session 1A:
Novel Technologies & Resilience Design

Session Chairs: Swaroop Ghosh (University of South Florida) and Tsung-Te Liu (National Taiwan University)
Session 1B:
Managing Energy in Wearable Devices

Session Chairs: Amin Khajeh (Broadcom) and Jishen Zhao (UC Santa Cruz)
Design and Implementation of a 4Kb STT-MRAM with Innovative 200nm Nano-Ring Shaped MTJ
Best Paper Candidate


Zheng Li1, Xiuyuan Bi1, Hai (Helen) Li1, Yiran Chen1, Jianying Qin2, Peng Guo2, Wenjie Kong2, Wenshan Zhan2, Xiufeng Han2, Hong Zhang3, Lingling Wang3 and Hanming Wu3

1University of Pittsburgh
2Chinese Academy of Sciences
3Semiconductor Manufacturing International Corporation
TeleProbe: Zero-Power Contactless Probing for Implantable Medical Devices
Best Paper Candidate


Woo Suk Lee, Younghyun Kim and Vijay Raghunathan

Purdue University
Ferroelectric Transistor based Non-Volatile Flip-Flop

Danni Wang1, Sumitha George1, Ahmedullah Aziz1, Suman Datta2, Vijaykrishnan Narayanan1 and Sumeet K. Gupta1

1Pennsylvania State University
2University of Notre Dame
SocialHBC: Social Networking and Secure Authentication Using Interference-Robust Human Body Communication

Shreyas Sen

Purdue University
Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures

Weizhe Hua, Ramy N. Tadros and Peter A. Beerel

University of Southern California
A Li-Ion Battery Charge Protocol with Optimal Aging-Quality of Service Trade-off

Yukai Chen, Alberto Bocca, Alberto Macii, Enrico Macii and Massimo Poncino

Politecnico di Torino
Comprehensive Analysis, Modeling and Design for Hold-Timing Resiliency in Voltage Scalable Design

Huanyu Wang, Geng Xie and Jie Gu

Northwestern University
An Energy-Efficient Computational Model for Uncertainty Management in Dynamically Changing Networked Wearables

Ramyar Saeedi, Ramin Fallahzadeh, Parastoo Alinia and Hassan Ghasemzadeh

Washington State University
12:00-13:30 Lunch
13:30-14:45 Session 2A:
Accelerators for Machine Learning

Session Chairs: Rangharajan Venkatesan (NVIDIA) and Wei Wu (Intel)
Session 2B:
Design Methodology for 3D IC

Session Chairs: Liangzhen Lai (ARM) and Matthew Ziegler (IBM)
Energy-Efficient Adaptive Classifier Design for Mobile Systems

Zafar Takhirov, Joseph Wang, Venkatesh Saligrama and Ajay Joshi

Boston University
Four-Tier Monolithic 3D ICs: Tier Partitioning Methodology and Power Benefit Study

Kwang Min Kim1, Saurabh Sinha2, Brian Cline2, Greg Yeric2 and Sung Kyu Lim1

1Georgia Institute of Technology
2ARM
Speeding Up Convolutional Neural Network Training with Dynamic Precision Scaling and Flexible Multiplier-Accumulator

Taesik Na and Saibal Mukhopadhyay

Georgia Institute of Technology
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-Level Monolithic 3D ICs

Bon Woong Ku1, Peter Debacker2, Dragomir Milojevic2, Praveen Raghavan2, Diederik Verkest2, Aaron Thean2 and Sung Kyu Lim1

1Georgia Institute of Technology
2IMEC
A Robust and Energy-Efficient Classifier Using Brain-Inspired Hyperdimensional Computing

Abbas Rahimi, Pentti Kanerva and Jan M. Rabaey

UC Berkeley
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs

Tiantao Lu, Caleb Serafy, Zhiyuan Yang and Ankur Srivastava

University of Maryland
14:45-15:15 Break
15:15-16:30 Session 3A:
Novel Circuit Design for Energy Efficiency

Session Chairs: Jaydeep P. Kulkarni (Intel) and Jae-sun Seo (Arizona State University)
Session 3B:
Energy Optimization for Emerging Applications

Session Chairs: Yiran Chen (University of Pittsburgh) and Cong Xu (HP Lab)
Modeling and Implementation of a Fully-Digital Integrated Per-Core Voltage Regulation System in a 28nm High Performance 64-Bit Processor

Ravinder Rachala, Miguel Rodriguez, Stephen Kosonocky and Milos Trajkovic

AMD
SATS: An Ultra-low Power Time Synchronization for Solar Energy Harvesting WSNs

Tongda Wu1, Yongpan Liu1, Hehe Li1, Chun Jason Xue2, Hyung Gyu Lee3 and Huazhong Yang1

1Tsinghua University
2City University of Hong Kong
3Daegu University
Regenerative Breaking: Recovering Stored Energy from Inactive Voltage Domains for Energy-Efficient Systems-on-Chip

Ali Najafi, Jacques C. Rudell and Visvesh Sathe

University of Washington
DeLight: Adding Energy Dimension to Deep Neural Networks

Bita Darvish Rouhani1, Azalia Mirhoseini2 and Farinaz Koushanfar1

1UC San Diego
2Rice University
Analysis and Design of Energy Efficient Time Domain Signal Processing

Zhengyu Chen and Jie Gu

Northwestern University
A Light-Powered, "Always On", Smart Camera with Compressed Domain Gesture Detection

Anvesha A, Shaojie Xu, Ningyuan Cao, Justin Romberg and Arijit Raychowdhury

Georgia Institute of Technology
16:40-18:00 Panel Session:
Where are the EDA tools for (ultra) low voltage IC design?

Arvind Vel, Ansys
Ed Grochowski, Intel
Mike Noonen, Silego Technologies
Paul Cunningham, Cadence
Stephen Kosonocky, AMD


Organizer: Chris Nicol, Wave Computing, Barry Pangrle
18:00-20:00 Industry Reception - Light Hors d'oeurve and Cocktail Reception
Tuesday, August 9, 2016
8:30-9:30 Keynote 2:
Rob Aitken - ARM Fellow

Title: Coordinating Communication, Technology and Design in the IOT Era
Abstract: Traditionally, low power design has focused on hardware building lower power circuits, communication networks, and memories. As we move into the Internet of Things era, however, its becoming clear that low power solutions must encompass hardware and software to deliver system-level optimization. While such solutions sound desirable and simple in theory, their practical implementation is complicated. This talk looks at some of the issues involved and explores promising avenues for future innovation.
9:30-10:00 Coffee Break
10:00-11:40 Session 4A:
Hardware Security

Session Chairs: Jie Gu (Northwestern University) and Carlos Tokunaga (Intel)
Session 4B - Invited Talks:
Heterogeneous Computing in Data Centers for Energy Efficiency

Session Chair: Jason Cong (UC Los Angeles)
Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs
Best Paper Award!


Chen Zhou, Saroj Satapathy, Yingjie Lao, Keshab K. Parhi and Chris H. Kim

University of Minnesota
Invited Talk: Extending the Moore's Law by Exploring New Data Center Architecture

Ouyang Jian

Baidu
Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines

Monodeep Kar1, Arvind Singh1, Sanu Mathew2, Anand Rajan2, Vivek De2 and Saibal Mukhopadhyay1

1Georgia Institute of Technology
2Intel Labs
Invited Talk: Heterogeneous Computing and Infrastructure for Energy Efficiency in Microsoft Data Centers

Derek Chiou

Microsoft
Performance Impact of Magnetic and Thermal Attack on STTRAM and Low-Overhead Mitigation Techniques

Jae-Won Jang and Swaroop Ghosh

University of South Florida
Invited Talk: Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter

Herman Schmit

Intel
An Energy-Efficient PUF Design: Computing While Racing

Hongxiang Gu, Teng Xu and Miodrag Potkonjak

UC Los Angeles
Invited Talk: Software Infrastructure for Enabling FPGA-based Accelerations in Data Centers

Peichen Pan

Falcon Computing Solutions
11:40-12:40 Lunch
12:40-14:00 Session 5A:
Architectures for Approximate Computing

Session Chairs: Xi Chen (Huawei) and Sri Parameswaran (University of New South Wales)
Session 5B:
Low Power Design Methodologies

Session Chairs: Amr Fahim (Intel)
On Effective and Efficient Quality Management for Approximate Computing

Ting Wang1, Qian Zhang1, Nam Sung Kim2 and Qiang Xu1

1The Chinese University of Hong Kong
2UI Urbana-Champaign
Unified Power Frequency Model Framework (Industry Perspectives)

Sriram Sundaram, Warren He, Sriram Sambamurthy, Aaron Grenat, Steve Liepe and Samuel Naffziger

AMD
ACAM: Approximate Computing based on Adaptive Associative Memory with Online Learning

Mohsen Imani1, Yeseong Kim1, Abbas Rahimi2 and Tajana Rosing1

1UC San Diego
2UC Berkeley
Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors

Matthew M. Ziegler1, Hung-Yi Liu2 and Luca P. Carloni2

1IBM
2Columbia University
Dynamic Approximation with Feedback Control for Energy-Efficient Recurrent Neural Network Hardware

Jaeha Kung, Duckhwan Kim and Saibal Mukhopadhyay

Georgia Institute of Technology
Invited Paper: Overview of IEEE1801-2015: Standard for Design and Verification of Low-Power, Energy-Aware Electronics Systems

Sushma Honnavara Prasad

Google
14:00-14:20 Coffee Break
14:20-16:00 Session 6A:
Low-power Designs for Sensing and Media

Session Chairs: Barry Pangrle and John Sampson (Pennsylvania State University)
Session 6B:
Dynamic Power and Thermal Management

Session Chairs: Parth Malani (Facebook) and Anand Raghunathan (Purdue University)
Data-Driven Low-Cost On-Chip Memory with Adaptive Power-Quality Trade-off for Mobile Video Streaming
Best Paper Candidate


Dongliang Chen, Jonathon Edstrom, Xiaowei Chen, Wei Jin, Jinhui Wang and Na Gong

North Dakota State University
DynSleep: Fine-Grained Power Management for a Latency-Critical Data Center Application

Chih-Hsun Chou, Daniel Wong and Laxmi N. Bhuyan

UC Riverside
An Energy-Aware Approach to Noise-Robust Moving Object Detection for Low-Power Wireless Image Sensor Platforms
Best Paper Award!


Jong Hwan Ko and Saibal Mukhopadhyay

Georgia Institute of Technology
HiCAP: Hierarchical FSM-based Dynamic Integrated CPU-GPU Frequency Capping Governor for Energy-Efficient Mobile Gaming

Jurn-Gyu Park1, Nikil Dutt1, Hoyeonjiki Kim2 and Sung-Soo Lim2

1UC Irvine
2Kookmin University
Bit Serializing a Microprocessor for Ultra-Low-Power

Matthew Tomei, Henry Duwe, Nam Sung Kim and Rakesh Kumar

University of Illinois
Prediction-Guided Performance-Energy Trade-off with Continuous Run-Time Adaptation

Taejoon Song1, Daniel Lo2 and G. Edward Suh1

1Cornell University
2Microsoft
A Programmable Analog-to-Information Converter for Agile Biosensing

Aosen Wang1, Zhangpeng Jin2 and Wenyao Xu1

1University at Buffalo
2Binghamton University
Therma: Thermal-Aware Run-Time Thread Migration for Nanophotonic Interconnects

Majed Valad Beigi and Gokhan Memik

Northwestern University
16:00-17:30 Poster Session:


Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches

Fabian Oboril1, Fazal Hameed1, Rajendra Bishnoi1, Ali Ahari1, Helia Naeimi2 and Mehdi Tahoori1

1Karlsruhe Institute of Technology
2Intel
Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) based Logic Circuits and 6T SRAM Cells

Chang-Hung Yu, Pin Su and Ching-Te Chuang

National Chiao Tung University
T-DVS: Temperature-Aware DVS based on Temperature Inversion Phenomenon

Jinsoo Park and Hojung Cha

Yonsei University
Enhancing DRAM Self-Refresh for Idle Power Reduction

Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski and Trevor Mudge

University of Michigan
FVCAG: A Framework for Formal Verification Driven Power Modeling and Verification

Arun Joseph, Spandana Rachamalla, Rahul M Rao, Anand Haridass and Pradeep K Nalla

IBM
STOCK: Stochastic Checkers for Low-Overhead Approximate Error Detection

Neel Gala1, Swagath Venkataramani2, Anand Raghunathan2 and V. Kamakoti1

1Indian Institute of Technology Madras
2Purdue University
Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization

Anteneh Gebregiorgis, Mohammad Saber Golanbari, Saman Kiamehr, Fabian Oboril and Mehdi B. Tahoori

Karlsruhe Institute of Technology
A 386uW, 15.2-Bit Programmable-Gain Embedded Delta-Sigma ADC for Sensor Applications

Jaehoon Jun, Cyuyeol Rhee and Suhwan Kim

Seoul National University
Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency

William J. Song1, Alper Buyuktosunoglu2, Chen-Yong Cher2 and Pradip Bose2

1Georgia Institute of Technology
2IBM
A Thermal-Aware Physical Space Allocation Strategy for 3D Flash Memory Storage Systems

Yi Wang, Mingxu Zhang, Lisha Dong and Xuan Yang

Shenzhen University
OS-based Resource Accounting for Asynchronous Resource Use in Mobile Systems

Farshad Ghanei, Pranav Tipnis, Kyle Marcus, Karthik Dantu, Steve Ko and Lukasz Ziarek

University at Buffalo
Dynamic Voltage Scaling Using Scene Change Detection for Video Playback on Mobile AMOLED Displays

Byung-Hoon Lee and Young-Jin Kim

Ajou University
Can We Guarantee Performance Requirements under Workload and Process Variations?

Dimitrios Stamoulis and Diana Marculescu

Carnegie Mellon University
A Low Power Current-Mode Flash ADC with Spin Hall Effect based Multi-Threshold Comparator

Zhezhi He and Deliang Fan

University of Central Florida
How to Cope with Slow Transistors in the Top-Tier of Monolithic 3D ICs: Design Studies and CAD Solutions

Sandeep Kumar Samal1, Deepak Nayak2, Motoi Ichihashi2, Srinivasa Banna2 and Sung Kyu Lim1

1Georgia Institute of Technology
2GLOBALFOUNDRIES
Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster

Chen Zhang1, Di Wu2, Jiayu Sun1, Guangyu Sun13, Guojie Luo13 and Jason Cong123

1Peking University
2UC Los Angeles
3PKU/UCLA Joint Research Institute in Science and Engineering
17:30- Banquet - Sunset Dinner Cruise on the San Francisco Bay
Wednesday, August 10, 2016
9:00-10:00 Keynote 3:
Goutam Chattopadhyay - Senior Research Scientist at NASA Jet Propulsion Lab

Title: Terahertz Technology and its Applications: Is it All Hype?
Abstract: In recent years, terahertz has caught the imagination of the researchers and scientists. Is it all hype? That is the question we will try to address in this talk.
10:00-10:30 Coffee Break
10:30-12:10 Session 7A:
Non-Volatile Memory: Technology & System

Session Chairs: Yongpan Liu (Tsinghua University) and Saibal Mukhopadhyay (Georgia Institute of Technology)
Session 7B:
Energy-Efficient Parallel Processing

Session Chairs: Kathy Wilcox (AMD) and Daniel Wong (UC Riverside)
Domain Wall Memory based Convolutional Neural Networks for Bit-Width Extendability and Energy-Efficiency

Jinil Chung1, Jongsun Park1 and Swaroop Ghosh2

1Korea university
2University of South Florida
Reducing Power Consumption of GPGPUs through Instruction Reordering

Homa Aghilinasab1, Mohammad Sadrosadati1, Mohammad Hossein Samavatian1 and Hamid Sarbazi-Azad12

1Sharif University of Technology
2Institute for Research in Fundamental Sciences
Design and Implementation of Nonvolatile Power-Gating SRAM Using SOTB Technology

Yusuke Shuto, Shuu'ichirou Yamamoto and Satoshi Sugahara

Tokyo Institute of Technology
A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques

Ivan Ratkovic12, Oscar Palomar12, Milan Stanic12, Osman Unsal1, Adrian Cristal123 and Mateo Valero12

1Barcelona Supercomputing Center
2Polytechnic University of Catalonia
3Centro Superior de Investigaciones Cientificas
An Efficient Parallel Scheduling Scheme on Multi-Partition PCM Architecture

Wen Zhou, Dan Feng, Yu Hua, Jingning Liu, Fangting Huang and Yu Chen

Huazhong University of Science and Technology
Power-Aware Performance Adaptation of Concurrent Applications in Heterogeneous Many-Core Systems

Ali Aalsaud1, Rishad Shafik1, Ashur Rafiev1, Fie Xia1, Sheng Yang2 and Alex Yakovlev1

1Newcastle University
2University of Southampton
In-Place Repair for Resistive Memories Utilizing Complementary Resistive Switches

Amirali Ghofrani, Miguel Angel Lastras-Montano, Yuyang Wang and Kwang-Ting Cheng

UC Santa Barbara
Design Contest Winner: A 128-Channel Spike Sorting Processor Featuring 0.175 W and 0.0033 mm2 per Channel in 65-nm CMOS

Seyed Mohammad Ali Zeinolabedin, Anh Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim

University of Michigan
12:10-12:20 Closing Remarks
12:20-13:30 Lunch
13:30-16:00 Embedded Tutorial:
Ambient Energy Harvesting Nonvolatile Sensor Platform for Internet of Things: From Circuit to System:

Organizer: Yongpan Liu, Tsinghua University and Jason Xue, City University of Hong Kong

Internet of things are regarded as a very promising market in the next decade. However, batteries have become as a critical obstacle due to their limited operating time and frequent maintenance. Energy harvesting techniques are proposed to relieve those problems and self-powered sensor nodes are attracting more and more attentions. A typical self-powered sensor node consists of power supply system and computation system and harvesting energy from ambient power sources, such as solar, vibration, temperature difference and RF energy.
Several major design challenges exist in the present self-powered sensor nodes: 1) Limited output power: The typical generated power ranges from several mW to hundreds of uW, leading to a gap of several orders of magnitude between the harvested energy and the consumption of mainstream low power chips. 2) Frequent power failures: Lots of power failures occur frequently in self-powered systems, requiring efficient operations in an energy intermittent mode. 3) Hard to predict: The power profiles are determined by the ambient factors and hard to be predicted.
This tutorial will provide several state-of-the-art techniques from circuit levels to system levels to handle above challenges, including nonvolatile processor design, architecture exploration of energy harvesting processor architecture and software and system optimization techniques for energy harvesting sensor platform.
Talk 1: Introduction to Energy Harvsting Sensing Platform and Nonvolatile Processor

Yongpan Liu

Tsinghua University
Talk 2: Architecture Exploration for Ambient Energy Harvesting Nonvolatile Processor

John Sampson

Pennsylvania State University
Talk 3: Compiler and Software Optimization for Energy Intermittent Sensing Platform

Mengying Zhao

City University of Hong Kong & Shandong University