Slides for Keynotes and Tutorials

  • Keynote Advances in Low-Power Verification by Janick Bergeron
  • Keynote Towards a Green Electronic World: A Collaborative Approach by Jaswinder Ahuja
  • Keynote Next-Generation Power-Aware Design by Takayasu Sakurai
  • Keynote System Implications of Integrated Photonics by Norman P. Jouppi and Parthasarathy Ranganathan
  • Power Management for Computer Systems and Datacenters by Karthick Rajamani, Charles Lefurgy, Soraya Ghiasi, Juan C Rubio, Heather Hanson, Tom Keller
  • A Tutorial on Test Power by Vishwani D. Agrawal
  • On Leakage Currents by Wolfgang Nebel and Domenik Helms
  • Low-Power Design Under Parameter Variations by Kaushik Roy and Swarup Bhunia
  • Clock Gating for Power Optimization in ASIC Design Cycle: Theory & Practice by Jairam S, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, Udayakumar H, Jagdish Rao
  • Low power chips: A fabless ASIC perspective by Shashank Bhonge and Vamsi Boppana